Mohamed Hassan - McMaster Experts

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Faculty of Engineering, McMaster University
Assistant Professor, Electrical and Computer Engineering, Faculty of Engineering

Scholarly Activity in McMaster Experts

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conferences
- Shared Data Kills Real-Time Cache Analysis. How to Resurrect It?. Proceedings -Design, Automation and Test in Europe, DATE. 1-6. 2024
- Improving Timing-Related Guarantees for Main Memory in Multicore Critical Embedded Systems. Proceedings - Real-Time Systems Symposium. 265-278. 2023
- The Case for tinyML in Healthcare: CNNs for Real-Time On-Edge Blood Pressure Estimation. Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing. 629-638. 2023
- Tracking Coherence-Related Contention Delays in Real-Time Multicore Systems. Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing. 461-470. 2023
- tinyCare: A tinyML-based Low-Cost Continuous Blood Pressure Estimation on the Extreme Edge. 2022 IEEE 10th International Conference on Healthcare Informatics (ICHI). 264-275. 2022
- Demystifying the Characteristics of High Bandwidth Memory for Real-Time Systems. IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers. 1-9. 2021
- DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance. The International Symposium on Memory Systems. 1-16. 2021
- Duetto: Latency Guarantees at Minimal Performance Cost. Proceedings -Design, Automation and Test in Europe, DATE. 1136-1141. 2021
- Empirical Evidence for MPSoCs in Critical Systems: The Case of NXP's T2080 Cache Coherence. Proceedings -Design, Automation and Test in Europe, DATE. 1162-1165. 2021
- The Best of All Worlds: Improving Predictability at the Performance of Conventional Coherence with No Protocol Modifications. Proceedings - Real-Time Systems Symposium. 218-230. 2020
- Analysis of memory-contention in heterogeneous COTS MPSoCs. Leibniz International Proceedings in Informatics. 2020
- Discriminative coherence: Balancing performance and latency bounds in data-sharing multi-core real-time systems. Leibniz International Proceedings in Informatics. 2020
- DRAMbulism: Balancing Performance and Predictability through Dynamic Pipelining. Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS. 82-94. 2020
- Enabling Predictable, Simultaneous and Coherent Data Sharing in Mixed Criticality Systems. Proceedings - Real-Time Systems Symposium. 420-432. 2019
- Managing DRAM Interference in Mixed Criticality Embedded Systems. 2019 31st International Conference on Microelectronics (ICM). 253-257. 2019
- On the Off-Chip Memory Latency of Real-Time Systems: Is DDR DRAM Really the Best Option?. Proceedings - Real-Time Systems Symposium. 495-505. 2018
- Bounding DRAM Interference in COTS Heterogeneous MPSoCs for Mixed Criticality Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2323-2336. 2018
- Predictable Cache Coherence for Multi-core Real-Time Systems. Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS. 235-246. 2017
- Criticality- and Requirement-Aware Bus Arbitration for Multi-Core Mixed Criticality Systems. Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS. 2016
- Elimination beam-forming in downlink multi-user MIMO systems. 2015 International Wireless Communications and Mobile Computing Conference (IWCMC). 1062-1067. 2015
- A framework for scheduling DRAM memory accesses for multi-core mixed-time critical systems. Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS. 307-316. 2015
- Reverse-engineering embedded memory controllers through latency-based analysis. Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS. 297-306. 2015
- ANFIS based MRAS speed estimator for sensorless control of PMSM. 2013 Brazilian Power Electronics Conference. 828-835. 2013
journal articles
- DISCO: Time-Compositional Cache Coherence for Multi-Core Real-Time Embedded Systems. IEEE transactions on computers. 72:1163-1177. 2023
- PISCOT: A Pipelined Split-Transaction COTS-Coherent Bus for Multi-Core Real-Time Systems. Transactions on Embedded Computing Systems. 22:1-27. 2023
- Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems. IEEE transactions on computers. 70:2098-2111. 2021
- MCsim: An Extensible DRAM Memory Controller Simulator. IEEE Computer Architecture Letters. 19:105-109. 2020
- Reduced latency DRAM for multi-core safety-critical real-time systems. Real-Time Systems. 56:171-206. 2020
- Exposing Implementation Details of Embedded DRAM Memory Controllers through Latency-based Analysis. Transactions on Embedded Computing Systems. 17:1-25. 2018
- Heterogeneous MPSoCs for Mixed-Criticality Systems: Challenges and Opportunities. IEEE Design and Test. 35:47-55. 2018
- A Comparative Study of Predictable DRAM Controllers. Transactions on Embedded Computing Systems. 17:1-23. 2018
- Characterization of Ge15Sb85 phase change material grown by pulsed laser deposition. Applied Physics A: Materials Science and Processing. 124:200. 2018
- PMC. Transactions on Embedded Computing Systems. 16:1-28. 2017
- HourGlass: Predictable Time-based Cache Coherence Protocol for Dual-Critical Multi-Core Systems 2017
- MCXplore: Automating the Validation Process of DRAM Memory Controller Designs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 37:1-1. 2017
- Phase ambiguity mitigation for per-cell codebook-based limited feedback coordinated multi-point transmission systems. IET Communications. 6:2378-2386. 2012
preprints
- On the Off-chip Memory Latency of Real-Time Systems: Is DDR DRAM Really the Best Option? 2018
- Heterogeneous MPSoCs for Mixed Criticality Systems: Challenges and Opportunities 2017