Managing DRAM Interference in Mixed Criticality Embedded Systems

Modern embedded systems such as those in autonomous vehicles, drones, and robots have a mixed criticality nature. They run both safety-critical tasks with tight timing constraints as well as non-critical tasks with high average performance demands. Traditional solutions deployed in both general-purpose computing as well as low-end embedded systems are no longer suitable. In this work, we study the challenges facing the deployment of commercial-off-the-shelf memory systems for mixed-criticality embedded systems and we provide potential solutions to enable such deployment.