On the Time Predictability of AXI4

Interconnects play a central role in the contention real-time tasks suffer in modern MPSoCs. Several works have been proposed to predictably arbitrate interconnects, regulate their bandwidth, and manage their buffering resources. However, the impact of point-to-point (P2P) communication protocols, e.g., AXI, on time predictability has been largely unexplored. In this work, we show that AXI, particularly AXI4, is non-time predictable and instead only focuses on ensuring correct functional behavior and providing high-average performance. Hence, connected components can incur unbounded latencies while fully adhering to AXI4 specification, effectively preventing its by-design safe use in real-time systems.