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Optimal Low Switching Frequency PWM Pattern for a...
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Optimal Low Switching Frequency PWM Pattern for a Three-Level Neutral Point Clamped (NPC) Inverter

Abstract

This paper proposes a mechanism of development of synchronous optimal pulse width modulation (PWM) generation for control of medium-voltage motor drives using multilevel inverters at low switching frequency. Multilevel inverters enable operation with multiple dc-link voltages while lowering total harmonic distortion (THD). Thermal losses limit the maximum switching frequency in high-power applications. As a result, the output waveforms are …

Authors

Vijayan AK; Batkhishig B; Narimani M; Emadi A

Volume

00

Pagination

pp. 2391-2397

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

March 23, 2023

DOI

10.1109/apec43580.2023.10131500

Name of conference

2023 IEEE Applied Power Electronics Conference and Exposition (APEC)