Automated Trace Signals Selection using the RTL Descriptions

Pre-silicon verification has been traditionally used for eliminating design bugs before tape-out. However, due to the increasing design complexity and the limited accuracy in circuit modelling, the number of the design errors that escape to silicon continues to grow. This is aggravated by the interactions between multiple clock and power domains in the modern system-on-a-chip devices. As a result, structured methods for post-silicon debugging, …