Combinatorial Methodologies Applied to the Advanced CMOS Gate Stack

As the CMOS gate stack continues to scale to smaller dimensions, new materials must be introduced into the stack to keep pace with design requirements. One way to measure the properties of new materials systems is through the use of high‐throughput experimentation, called combinatorial methodology. We describe two examples of combinatorial experimental design for CMOS. In the first, we will demonstrate library design and growth of Al‐Hf‐Y‐O films for high‐k applications. In the second, we will demonstrate Ni‐Ti‐Pt metal gate libraries for Si/Hf02/metal gate electrode applications.