Phase noise in a back-gate biased low-voltage VCO

The phase noise in an ultra low-power and low-voltage CMOS voltage controlled oscillator (VCO) has been measured and modelled for supply voltage V/sub DD/ from 1.8 V down to 80 mV with various body bias voltages V/sub BS/. The VCO is a fully integrated ring oscillator designed in a 0.18 /spl mu/m CMOS technology. In this design, the frequency can be controlled by V/sub BS/. The effects of scaling V/sub DD/ together with the effect of V/sub BS/ on the phase noise are examined experimentally and theoretically. It has been observed that the phase noise at V/sub DD/ >0.5 V is dominated by the upconverted 1/f noise. But the low frequency noise disappears when V/sub DD/ decreases below 0.5 V. Application of forward body bias voltages from 0 to 0.6 V also provides a practical method to suppress the low frequency noise being upconverted to phase noise.