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Index Mapping for Bit-Error Resilient Multiple Description Lattice Vector Quantizer

Abstract

This work addresses the construction of bit-error resilient multiple description lattice vector quantizers (MDLVQ) by proposing the design of a structured mapping $\gamma$ of side lattice points to binary indexes. We assume that the first description is correct while the second description may carry bit errors. To design the mapping $\gamma$ the set of side lattice points is first partitioned into Voronoi regions of an appropriate coarse lattice. Next a good channel code $C$ is selected, each Voronoi region is assigned a coset of this channel code and the side lattice points within each Voronoi region are mapped to binary sequences in the corresponding coset. We derive a lower bound on the error correction performance of the mapping $\gamma$ in terms of the performance of the code $C$ and we show that, as the rate of the MDLVQ grows to $\infty$, the mapping $\gamma$ becomes as good as the code C. Simulation results show the significant superiority of the proposed mapping versus random mappings.

Authors

Dumitrescu S; Chen Y; Chen J

Pagination

pp. 2588-2592

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

June 1, 2017

DOI

10.1109/isit.2017.8006997

Name of conference

2017 IEEE International Symposium on Information Theory (ISIT)
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