published in Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Journal
presented at event 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) Conference
keywords Computer Science Computer Science, Theory & Methods Engineering Engineering, Electrical & Electronic Post-silicon clock tuning Science & Technology Technology configuration of clock tuning elements setup/hold-time violations