publication venue for
- Editorial: Silicon debug and diagnosis. 1:659-659. 2007
- Resource-constrained system-on-a-chip test: a survey. 152:67-67. 2005
- Dual multiple-polynomial LFSR for low-power mixed-mode BIST. 150:209-209. 2003
- Analysing trade-offs in scan power and test data compression for systems-on-a-chip. 149:188-188. 2002
- Minimising power dissipation in partial scan sequential circuits. 148:163-166. 2001
- Minimisation of power dissipation during test application in full-scan sequential circuits using primary input freezing. 147:313-313. 2000