A 2-D Noise Model for CMOS Single Photon Avalanche Diodes

Recent advances have enabled single-photon avalanche diodes (SPADs) to be fully integrated with CMOS signal conditioning and processing circuits, paving the way for compact and efficient imaging applications. However, a significant challenge remains: the absence of accurate models for optimizing the SPAD design prior to fabrication. In this paper, we present a comprehensive noise model and compare simulation results with experimental measurements. Our findings highlight the effectiveness and the necessity of robust SPAD modeling for design optimization as a critical step before fabrication.