Conference
Testing in the Presence of NOCs
Abstract
The common global on-chip bus is becoming a bottleneck in communication bandwidth and power dissipation. Multi-bus approaches provide temporary alleviation, but the longer-term scalable solution is a Network-on-Chip (NOC). A NOC consists of a network of shared communication links and routers, which connect to the various IP cores through Network Interfaces. NOC-based SOC design seems to be moving from the research phase to first industrial …
Authors
Marinissen EJ; Nicolici N; Cota E; Ivanov A
Pagination
pp. 477-478
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Publication Date
May 1, 2007
DOI
10.1109/vts.2007.60
Name of conference
25th IEEE VLSI Test Symposium (VTS'07)