Interaction between device technologies and computer communication networks circuits

The interactions between high-speed solid-state devices and computer communication networks and circuits are discussed, and it shown that the performances of these circuits are critically dependent on those of the devices. The implementation with three different technologies of the digital XOR phase detector, a crucial element in PLL clock recovery circuits, was investigated in detail. From MSPICE simulations, it was found that the GaAs-based phase detector has superior speed, reduced logic voltage levels, reduced noise margins, and higher power dissipation compared to the CMOS implementation. The ECL XOR circuit can operate at higher frequencies, but it also has reduced logic levels and the highest power dissipation compared to either the CMOS or GaAs XOR gate. Since both ECL and GaAs circuits use nonconventional voltage levels, with the resulting nonconventional input and output logic voltages, appropriate modifications in the interface circuit with the other computer communications networks are needed.<>