Conference
A Novel 2T2R CR-based TCAM Design for High-speed and Energy-efficient Applications
Abstract
A 2T2R current race (CR) based ternary content addressable memory (TCAM) design is proposed using resistive random-access memory (RRAM) technology. The suggested design adopts a match-line (ML) booster feature in sensing amplifier to improve search speed and tolerance to RRAM switching variations. An SR-latch cascading scheme is presented to further improve the speed and energy efficiency for large TCAM array. Additionally, a same clock phase …
Authors
Pan K; Tosson AMS; Wang N; Zhou NY; Wei L
Pagination
pp. 33-38
Publisher
Association for Computing Machinery (ACM)
Publication Date
June 6, 2022
DOI
10.1145/3526241.3530336
Name of conference
Proceedings of the Great Lakes Symposium on VLSI 2022