Recent Advancement in High-Frequency Noise Characterization for Nano-Scale FETs

This paper covers three recent improvements in high- frequency (HF) noise characterization for nano-scale field-effect transistors (FET). It includes (1) system- aware Device-Under-Test (DUT) design for optimum HF on-wafer noise measurement, (2) statistically robust and cost-effective gate resistance extraction algorithm, and (3) low-power noise source working in subthreshold region for mobile/portable applications. Experimental data and simulated results in different technologies are presented.