Conference
Bounding DRAM Interference in COTS Heterogeneous MPSoCs for Mixed Criticality Systems
Abstract
Commercial off-the-shelf (COTS) heterogeneous multiple processors systems-on-chip (MPSoCs) are appealing platforms for emerging mixed criticality systems (MCSs). To satisfy MCS requirements, the platform must guarantee predictable timing bounds for critical applications, without degrading average performance for noncritical applications. In particular, this paper studies the main memory subsystem, which in modern MPSoCs is typically based on …
Authors
Hassan M; Pellizzoni R
Volume
37
Pagination
pp. 2323-2336
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Publication Date
November 1, 2018
DOI
10.1109/tcad.2018.2857379
Conference proceedings
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue
11
ISSN
0278-0070