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Test Data Compression: The System Integrator's Perspective

Abstract

Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but also the bandwidth requirements. In this paper we provide a quantitative analysis of two distinctive TDC methods from the system integrator's standpoint considering a core based SOC environment. The proposed analysis addresses four parameters: compression ratio, test application time, area overhead and power dissipation. Based on our analysis, some future research directions are given which can lead to an easier integration of TDC in the SOC design flow and to further improve the four parameters.

Authors

Gonciari PT; Al-Hashimi BM; Nicolici N

Pagination

pp. 726-731

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

January 1, 2003

DOI

10.1109/date.2003.1253693

Name of conference

2003 Design, Automation and Test in Europe Conference and Exhibition

Labels

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