Conference
A methodology for automated design of embedded bit-flips detectors in post-silicon validation
Abstract
Post-silicon validation is concerned with detecting design errors that escape to silicon prototypes and need to be fixed before committing to high-volume manufacturing. Electrical errors are particularly difficult to catch during the pre-silicon phase because of the insufficient accuracy of device models, which is often traded-off against simulation time. This challenge is further aggravated by the rising number of voltage domains, especially …
Authors
Taatizadeh P; Nicolici N
Pagination
pp. 73-78
Publisher
EDAA
DOI
10.7873/date.2015.0342
Name of conference
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
Conference proceedings
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE)
ISSN
1530-1591