On-Chip Generation of Uniformly Distributed Constrained-Random Stimuli for Post-Silicon Validation

Post-silicon validation is becoming widely adopted because it runs significantly faster than pre-silicon verification and hence it helps uncover subtle design errors that escape to silicon prototypes. However, it is hindered by limited controllability and observability, which makes it challenging to reuse pre-silicon content. In order to enable the reuse of stimuli constraints from pre-silicon verification environments, we present a method that facilitates the on-chip generation of uniformly distributed constrained-random stimuli. More specifically, our method, which relies on new pre-processing steps and on-chip hardware features, can generate in real-time pseudo cyclic-random stimuli with no repetition until the space of the compliant stimuli is exhausted.