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A New Approach of High Frequency Noise Modeling for 70-nm NMOS Transistors by Accurate Noise Source Extraction

Abstract

Noise sources of 70-nm NMOS transistors were extracted to reveal the channel noise is dominant up to 26 GHz. Gate induced noise increased in proportion to $f^2$, however, its level was 1 to 2 orders of magnitude lower than the channel noise. A new approach to accurately capturing the behavior of thermal noise by compensating for the discrepancy between extracted and simulated channel noise through the addition of an excess noise source was demonstrated. The excess noise source was incorporated into our RFMOS model, which enabled us to accurately simulate noise parameters. By using this technique the noise figure of MOS transistors at any source impedance values can be simulated correctly.

Authors

Kiyota Y; Chen C-H; Kubodera T; Nakamura A; Takeshita K; Deen MJ

Pagination

pp. 635-638

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

June 1, 2007

DOI

10.1109/rfic.2007.380963

Name of conference

2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium

Conference proceedings

2008 IEEE Radio Frequency Integrated Circuits Symposium

ISSN

1529-2517

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