Call for papers second international workshop on compact thin-film transistor (TFT) modeling for circuit simulation

In recent years, the increasing use of active matrix flat-panel displays and bio-medical imagers in commercial electronic products has drawn a significant attention to thin-film transistors (TFT) and technologies. TFTs on amorphous- and poly-silicon as well as newly emerging organic, transparent metal oxide and nano-composite semiconductor technologies are becoming increasingly common. For example, flat panel displays are finding widespread use in many products such as cellular phones, personal digital assistants (PDAs), camcorders, laptop personal computers (PCs), to name a few. The active matrix display is composed of a grid or matrix of picture elements called as “pixels”. Thousands or millions of these pixels together create an image on the display, in which the TFTs act as switches to individually turn each pixel. More increasingly TFTs are starting to be used as analog circuit elements for rudimentary signal conditioning. Therefore, physically-based compact modeling of TFTs for circuit simulation is crucial to accurately and reliably predict TFT behavior in the active matrix. A concentrated R&D effort is critical for developing physically-based compact TFT models for emerging thin-film technologies, and significant R&D efforts along these lines are underway world-wide.