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Simulating the behaviour of software modules by...
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Simulating the behaviour of software modules by trace rewriting

Abstract

The trace assertion method is a module interface specification method based on the finite state machine model. To support this method, the authors plan to develop a specification simulation tool, a trace simulator, that symbolically interprets trace assertions of trace specifications and simulates the externally observable behavior of the modules specified. They first present the trace assertion method. Then trace rewriting systems are formally …

Authors

Wang Y; Parnas DL

Pagination

pp. 14-23

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

January 1, 1993

DOI

10.1109/icse.1993.346059

Name of conference

Proceedings of 1993 15th International Conference on Software Engineering

Conference proceedings

Software Engineering

ISSN

2162-8408