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A Single-Chip Dual-Band 0.25μm CMOS Transceiver...
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A Single-Chip Dual-Band 0.25μm CMOS Transceiver for 802.11a/b/g Wireless LAN

Abstract

This paper presents a dual-band, 5.15GHz-5.35GHz, 2.4GHz-2.5GHz, transceiver for IEEE 802.11a/b/g standards in a 0.25mum CMOS process. With a novel architecture and frequency planning, only one voltage-controlled oscillator and frequency synthesizer is required to perform frequency transferring for dual-band operation, and the building blocks of both receiver and transmitter could be shared as many as possible. The fully integrated VCO and frequency synthesizer centered at 3.8GHz achieves an integrated phase noise of 1.35deg rms. The transmitter achieves -33dB EVM at -3dBm output power, and -29dB EVM at -7dBm output power from the integrated preamplifier for 2.4GHz and 5GHz bands respectively. The receiver also exhibits a noise figure of 3dB at 2.4GHz band and 3.8dB at 5GHz band. The transceiver occupies an area of 25mm2

Authors

Kuo M-C; Lee Y-B; Kao S-W; Chen C-H; Ko C-L; Yang T-Y

Pagination

pp. 261-264

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

November 1, 2005

DOI

10.1109/asscc.2005.251715

Name of conference

2005 IEEE Asian Solid-State Circuits Conference
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