A New Space Vector Modulation Technique for Common-Mode Voltage Reduction in both Magnitude and Third-Order Component

A new space vector modulation (SVM) technique reducing both magnitude and third-order harmonic component of the common-mode voltage (CMV) in a two-level voltage-source inverter (VSI) is proposed in this paper. For reference synthesis, the method uses a set of virtual space vectors constructed from original stationary vectors that produce the lowest CMV magnitudes. Since the average CMV of each virtual space vector is zero, both magnitude and third-order harmonic component of the generated CMV are reduced, contributing to better overall CMV performance and common-mode filter design in VSI applications. Three variants of the proposed modulation method using different virtual space vector combinations are presented. Simulation results and comparisons with existing methods are provided to verify the proposed technique.