On the Performance Analysis and Design of an Integrated Front-End PIN/HBT Photoreceiver

A detailed study on the performance analysis and optimum design of an integrated front-end PIN/HBT photoreceiver for fiber-optic communication is presented. Receiver circuits with two different transimpedance amplifiers—a single-stage common emitter (CE) amplifier and a three-stage amplifier comprising a CE amplifier and two emitter followers (EFs), are analyzed assuming a standard load of 50 $\Omega$. A technique to include the transit-time effect of a PIN photodetector on the overall receiver circuit analysis is introduced and discussed. Gain–bandwidth product (GB) and gain–bandwidth–sensitivity measure product (GBS) are obtained as functions of feedback resistance $(R_F)$ and various device parameters. Hence, some optimum designs are suggested using a photodetector of area 100 $\mu$ m2 and with a feedback resistance of 500 $\Omega$. The bandwidth plays a major role in determining the optimum designs for maximum GB and maximum GBS. A bandwidth ${>}8$ GHz has been obtained for the photoreceiver even with a single-stage CE amplifier. The optimum design for a receiver with a three-stage amplifier shows a bandwidth of 35 GHz which is suitable for receivers operating well beyond 40 Gb/s; however, in this case, the gain is reduced. The performance of different fixed square-emitter structures are investigated to choose the optimum designs corresponding to different gains. Very low power dissipation has been estimated for the optimized devices. The noise performance of the devices with optimum designs was calculated in terms of the minimum detectable optical power for a fixed bit-error rate of 10−9. The present design indicates that GB and noise performance can be improved by using an optimum device design.