Evaluation of free-running ADCs for high resolution PET data acquisition Conference Paper uri icon

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abstract

  • Advances in field-programmable gate arrays (FPGA) allow a larger part of analog circuits to be replaced by digital logic. We are prototyping a high-resolution position- sensitive APD (PSAPD) based PET system, using a fully digital data acquisition system with free-running analog-to-digital converters (ADC) and FPGA logic. Numerical algorithms for digital shaping and digital timing pickup were tested and the results were compared to those obtained by using analog NIM modules for a LSO/PSAPD detector module, in terms of energy resolution, time resolution and positioning ability. A significant improvement in the coincidence time resolution was found using a digital CFD (4.71+/-0.07 ns FWHM) over the analog counterpart (3.15+/- 0.07 ns). A linear time interpolation model provides the best time resolution (1.72+/-0.07 ns).

authors

  • Peng, Hao
  • Olcott, PD
  • Foudray, AMK
  • Levin, CS

publication date

  • October 2007