Embedded memory binding in FPGAs

Embedded memory blocks have been integrated infield-programmable gate-arrays (FPGAs) for over a decade. Their count, as well as their capacity and the number of configurations, has increased over time. This growth poses unique challenges to binding the large number of embedded memory blocks to the data vectors that exist in the applications mapped onto FPGAs. In this paper we discuss how this challenge can be addressed algorithmically.