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Bit-error Resilient Index Assignment for Multiple...
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Bit-error Resilient Index Assignment for Multiple Description Scalar Quantizers

Abstract

This work addresses the problem of increasing the robustness to bit errors for two description scalar quantizers. To this aim a permutation is applied to the indices of each description. We show how to construct permutation pairs that increase the minimum Hamming distance of the set of valid index pairs to 3 when the redundancy is sufficiently high. Additionally, for the case when one description is known to be correct we propose a new performance criterion, denoted by $d_{side, min}$. This represents the minimum Hamming distance of the set of valid indices of one description, when the index of the other description is fixed. We develop a technique for constructing permutation pairs achieving $d_{side, min}\geq h$ based on a linear $(R, \lceil {\rm log}, m\rceil)$ channel code of minimum Hamming distance $h+1$, where $R$ is the rate of each description and $m$ is the number of diagonals occupied by the valid index pairs in the matrix of the initial index assignment.

Authors

Dumitrescu S; Wan Y

Pagination

pp. 191-195

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

July 1, 2013

DOI

10.1109/isit.2013.6620214

Name of conference

2013 IEEE International Symposium on Information Theory
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