Logic synthesis for asynchronous circuits based on STG unfoldings and incremental SAT
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Overview
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Research
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Computer Science
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Computer Science, Software Engineering
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Mathematics
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Mathematics, Applied
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PETRI NETS
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Petri nets
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Physical Sciences
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STG
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Science & Technology
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Technology
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asynchronous circuits
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automated synthesis
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incremental SAT
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logic synthesis
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net unfoldings
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partial order techniques
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self-timed circuits
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signal transition graphs
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