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Journal article

Emulation Infrastructure for the Evaluation of Hardware Assertions for Post-Silicon Validation

Abstract

The objective of post-silicon validation is to identify design errors that remain undetected after pre-silicon verification and, therefore, manifest themselves in the silicon prototypes. These errors are often associated with the subtle interactions between the electrical states of the systems and commonly manifest in the logic domain as bit-flips in flip-flops. They occur under unique operating conditions, which are often not-easily …

Authors

Taatizadeh P; Nicolici N

Journal

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, No. 6, pp. 1866–1880

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

June 1, 2017

DOI

10.1109/tvlsi.2017.2658564

ISSN

1063-8210