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Improved Method for Paralleling Reduced Switch VSI...
Journal article

Improved Method for Paralleling Reduced Switch VSI Modules: Harmonic Content and Circulating Current

Abstract

A new zero-sequence circulating current (ZSCC) reduction method for multimodule voltage source inverters (MVSIs) consisting of $P$ three-phase inverters that are connected in parallel is proposed in this paper. Four-switch inverter modules are used instead of the conventional six-switch modules to reduce the cost. In this paper, the effectiveness of the proposed ZSCC reduction method is studied using selective harmonic elimination pulse width …

Authors

Narimani M; Moschopoulos G

Journal

IEEE Transactions on Power Electronics, Vol. 29, No. 7, pp. 3308–3317

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

July 1, 2014

DOI

10.1109/tpel.2013.2280723

ISSN

0885-8993