Interview With Janusz Rajski

Nicola Nicolici: Good evening and I would like to welcome Janusz Rajski, a Life Fellow of IEEE, who received the Ph.D. degree in electrical engineering from Poznan textasciiacute University of Technology, Poland, in 1982. He is currently the vice president of engineering at Siemens Tessent Wilsonville, Wilsonville, OR, USA. During his tenure at Siemens, he has built a strong international research and development organization with a focus on innovative DFT technologies. His team has developed several revolutionary products widely adopted by the semiconductor industry: TestKompress, cell-aware test, and streaming scan networks. He has published 300 IEEE research papers and is a co-inventor of 130 U.S. and international patents. His papers won prestigious awards, including two best paper awards published in IEEE Transactions on CAD, one on logic synthesis and another on test compression. In 2009, Janusz received the Stephen Swerling Innovation Award from Mentor Graphics for his breakthrough innovation TestKompress and revitalizing Mentor’s DFT business to its current position as the number one test business in EDA. In 2018, he received the Siemens Inventor of the Year Lifetime Achievement Award for his extensive contributions to DFT. In 2023, he received the prestigious Bob Madge Innovation Award. Welcome, Janusz.