An ultra‐low power and low jitter frequency synthesizer for 5G wireless communication and IoE applications

Abstract This paper presents a fully integrated analog phase‐locked loop (PLL) fractional‐ N frequency synthesizer for 5G wireless communication and Internet‐of‐Everything (IoE) applications. To demonstrate the effectiveness of this frequency synthesizer, we apply it to three wireless communication standards. Contrary to using Verilog or VHDL to implement the programmable frequency divider, we propose a new approach in the transistor level …