Journal article
Neuromorphic architectures for nanoelectronic circuits
Abstract
Abstract This paper reviews recent important results in the development of neuromorphic network architectures (‘CrossNets’) for future hybrid semiconductor/nanodevice‐integrated circuits. In particular, we have shown that despite the hardware‐imposed limitations, a simple weight import procedure allows the CrossNets using simple two‐terminal nanodevices to perform functions (such as image recognition and pattern classification) that had been …
Authors
Türel Ö; Lee JH; Ma X; Likharev KK
Journal
International Journal of Circuit Theory and Applications, Vol. 32, No. 5, pp. 277–302
Publisher
Wiley
Publication Date
September 2004
DOI
10.1002/cta.282
ISSN
0098-9886