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Heterogeneous MPSoCs for Mixed-Criticality...
Journal article

Heterogeneous MPSoCs for Mixed-Criticality Systems: Challenges and Opportunities

Abstract

Editor’s note: This article presents the challenges and the opportunities in designing mixed-criticality systems with heterogeneous Multiple-Processor System-on-Chip (MPSoC) architectures. —Tulika Mitra, National University of Singapore —Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg—Lothar Thiele, ETH Zurich

Authors

Hassan M

Journal

IEEE Design and Test, Vol. 35, No. 4, pp. 47–55

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

August 1, 2018

DOI

10.1109/mdat.2017.2771447

ISSN

2168-2356

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