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Timestamp Temporal Logic (TTL) for Testing the...
Journal article

Timestamp Temporal Logic (TTL) for Testing the Timing of Cyber-Physical Systems

Abstract

In order to test the performance and verify the correctness of Cyber-Physical Systems (CPS), the timing constraints on the system behavior must be met. Signal Temporal Logic (STL) can efficiently and succinctly capture the timing constraints of a given system model. However, many timing constraints on CPS are more naturally expressed in terms of events on signals. While it is possible to specify event-based timing constraints in STL, such …

Authors

Mehrabian M; Khayatian M; Shrivastava A; Eidson JC; Derler P; Andrade HA; Li-Baboud Y-S; Griffor E; Weiss M; Stanton K

Journal

ACM Transactions on Embedded Computing Systems, Vol. 16, No. 5s, pp. 1–20

Publisher

Association for Computing Machinery (ACM)

Publication Date

October 31, 2017

DOI

10.1145/3126510

ISSN

1539-9087