Journal article
BIST hardware synthesis for RTL data paths based on test compatibility classes
Abstract
A new built-in self-test (BIST) methodology for register transfer level (RTL) data paths is presented. The proposed BIST methodology takes advantage of the structural information of the RTL data path and reduces the test application time by grouping same-type modules into test compatibility classes (TCCs). During testing, compatible modules share a small number of test pattern generators at the same test time leading to significant reductions …
Authors
Nicolici N; Al-Hashimi BM; Brown AD; Williams AC
Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No. 11, pp. 1375–1385
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Publication Date
2000
DOI
10.1109/43.892861
ISSN
0278-0070