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Automated Selection of Assertions for Bit-Flip...
Journal article

Automated Selection of Assertions for Bit-Flip Detection During Post-Silicon Validation

Abstract

Post-silicon validation deals with detection and diagnosis of errors that, due to existing limitations in pre-silicon verification, escape to the silicon prototypes and need to be fixed before committing to high-volume manufacturing. Electrical errors, such as those caused by cross-talk or power droops, are particularly difficult to catch during the pre-silicon phase because of the insufficient accuracy of device models, which is often …

Authors

Taatizadeh P; Nicolici N

Journal

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 12, pp. 2118–2130

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

January 1, 2016

DOI

10.1109/tcad.2016.2538087

ISSN

0278-0070