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Diagnosis of Logic Circuits Using Compressed...
Journal article

Diagnosis of Logic Circuits Using Compressed Deterministic Data and On-Chip Response Comparison

Abstract

While manufacturing test helps to isolate faulty devices from the good ones, diagnosis is enabling a faster transition from the yield learning to the volume production phase of a new process technology. Given the escalating design complexity, new methods such as embedded deterministic test have been proposed in recent years to deal with the cost of manufacturing test. This paper discusses diagnosis of logic blocks by leveraging the existing …

Authors

Kinsman AB; Ollivierre S; Nicolici N

Journal

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 14, No. 5, pp. 537–548

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

May 1, 2006

DOI

10.1109/tvlsi.2006.876109

ISSN

1063-8210