Cryogenic temperature dependence of the voltage transfer characteristics of CMOS inverters

The voltage transfer characteristics of CMOS inverters have been studied in detail as a function of temperature between 77 and 300 K and supply voltages between 2 and 20 V. The logic levels, maximum gain, unity gain points, noise margins and other parameters, such as (VH − VL), all showed a marked improvement as the temperature was lowered. In particular, for one inverter with a supply of 5 V, the maximum gain increased from 57 to 105, (VIH − VIL) decreased from 0.50 to 0.28 V and (VH − VL) increased from 4.46 to 4.75 V on decreasing the temperature from 300 to 77 K. For all the inverters, these and other parameters showed a smooth monotonic improvement as the temperature was lowered. These and the other results obtained can be qualitatively explained as due to an increase in the absolute values in the threshold voltages of the PMOS and NMOS transistors and to an increase in the carrier mobility as the temperature was lowered.