Journal article
Simulating the behavior of software modules by trace rewriting
Abstract
The trace assertion method is a module interface specification method based on the finite state machine model. To support this method, we plan to develop a specification simulation tool, a trace simulator, that symbolically interprets trace assertions of trace specifications and simulates the externally observable behavior of the modules specified. We first present the trace assertion method. Then we formally define trace rewriting systems and …
Authors
Wang Y; Parnas DL
Journal
IEEE Transactions on Software Engineering, Vol. 20, No. 10, pp. 750–759
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Publication Date
1994
DOI
10.1109/32.328996
ISSN
0098-5589