Journal article
BIST hardware synthesis for RTL data paths based on test compatibility classes
Abstract
New builtin selftest (BIST) methodology for register transfer level (RTL) data paths is presented. The proposed BIST methodology takes advantage of the structural information of RTL data path and reduces the test application time by grouping sametype modules into test compatibility classes (TCCs). During testing, compatible modules share a small number of test pattern generators at the same test time leading to significant reductions in BIST …
Authors
Nicolici N; AlHashimi BM; Brown AD; Williams AC
Journal
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Vol. 19, No. 11,
Publication Date
December 1, 2000
ISSN
0278-0070