High frequency noise of MOSFETs I Modeling

In this paper, a model is proposed which can predict accurately both ac and noise performance (all four noise parameters: minimum noise figure NFmin, equivalent noise resistance Rn, optimized source resistance Ropt and reactance Xopt) of MOSFETs based on s-parameter and noise measurements at microwave frequencies. This model includes the relevant high frequency noise sources (i.e. the channel thermal noise, the induced gate noise and its correlation with the channel thermal noise and the thermal noise from the gate and parasitic resistances). In order to confirm the accuracy of the model and obtain the intrinsic scattering and noise parameters of devices, two de-embedding techniques (probe pad equivalent circuit modeling and direct parasitic noise de-embedding) have been used to de-embed the probe pad parasitics from the measured noise and s-parameters of the device-under-test (DUT). In addition, because of the complexity of this noise model, a direct calculation technique for calculating the four noise parameters was developed based on the small-signal transistor's model. Finally, the impact of gate resistance, and the noise improvement using multi-finger gate design are investigated.