Operational characteristics of a CMOS microprocessor system at cryogenic temperatures

In this Paper, the variation of the maximum input clock frequency versus temperature of a CMOS microprocessor with a ‘piggy-back’ EPROM is described. The maximum input frequency for reliable operation increased from 19 to 33 MHz as the temperature was lowered from 300 to 77 K, and there was a corresponding increase in the power dissipated from 18 to 25 mW using a supply of 5 V. The measurements were repeatable even after thermal cycling more than 10 times and showed no hysteresis on cooling down to 77 K or warming up to 300 K. The results obtained can be qualitatively explained as due to a combination of effects including the increase in the carriers' mobilities, the decrease in junction capacitance, and the decrease in the interconnect resistance with decreasing temperature.