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Comparison of drain-induced barrier-lowering in...
Journal article

Comparison of drain-induced barrier-lowering in short-channel NMOS and PMOS devices at 77 K

Abstract

This paper presents detailed comparisons between the room temperature and liquid nitrogen temperature experimental and 2-D simulation DIBL results in varying channel lengths NMOS and PMOS devices. The results in PMOS devices showed that DIBL is always worse at 300 than at 77 K. However, for NMOS devices, a unique DIBL temperature-dependent feature was observed, that is, DIBL is improved for devices with L < 0.6 and L > 1.2 μm, but is worse for devices in …

Authors

Yan ZX; Deen MJ

Journal

Solid-State Electronics, Vol. 34, No. 10, pp. 1065–1070

Publisher

Elsevier

Publication Date

10 1991

DOI

10.1016/0038-1101(91)90101-4

ISSN

0038-1101