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Digital characteristics of CMOS devices at...
Journal article

Digital characteristics of CMOS devices at cryogenic temperatures

Abstract

The results of measurements of the digital characteristics of CMOS devices as a function of temperature between 77 and 300 K and of supply voltage between 3 and 20 V are presented. Using a fixed supply of 5 V, the low noise margin decreased from 2.54 to 2.11 V, but the high noise margin increased from 2.18 to 2.40 V as the temperature was increased from 77 to 300 K. On lowering the temperature from 300 to 77 K, both V/sub II/ and V/sub IH/ …

Authors

Deen MJ

Journal

IEEE Journal of Solid-State Circuits, Vol. 24, No. 1, pp. 158–164

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Publication Date

1989

DOI

10.1109/4.16315

ISSN

0018-9200