A simple propagation delay model for BiCMOS driver circuits

A simple new propagation delay model that is particularly suitable for the high-level injection operation of the bipolar transistor in BiCMOS driver circuits is presented in this paper. The comparison with the SPICE simulation results shows that the new model predicts propagation delay vs knee current, forward current gain, forward transit time and p-MOSFET drain current with errors less than 10% in most cases under varying load capacitances from 5 to 20 pF. In addition to being simple and easy to use, the new model does not require any empirical constants for fits to SPICE.